Topology-Driven Neural Defect Pattern Discovery in Silicon Wafers

Authors

  • Dhanaraj Sathiri Author
    Competing Interests

    AI,ML

DOI:

https://doi.org/10.5281/zenodo.20591504

Keywords:

Semiconductor wafer inspection; defect pattern clustering; development and manufacturing of integrated circuits; supervised learning; convolutional neural networks; topological data analysis; decisionsupport; structural heat-damping composite materials; lab-scale manufacture; controlled heat-damping properties.

Abstract

Semiconductor wafers undergo regular pattern inspections that are essential for assessing production quality. Recent years have seen the rise of deep-learning techniques for automating pattern recognition. They remain underexplored, however, for specific inspection tasks such as clustering similar defect patterns. TDA-based methods have been proposed that utilize TDA to delimit defect patterns and a Gaussian mixture model to perform clustering. A deep neural network is leveraged for the underlying representation learning. A recent dataset of defect pattern images is explored to enable better recognition of such inspections. Results indicate that the method outperforms several baseline methods in clustering accuracy across multiple scenes.

Semiconductors perform information acquisition, processing, transmission, and control, and are called the “brain” of electronics. They experience regular pattern inspections at each phase of the manufacturing process, with the inspection results serving as important references for process evaluation and control. Take wafer patterns as an example: if a pattern has serious defects, it cannot be used in subsequent manufacturing processes and must be discarded. Therefore, fast and effective inspection of wafer patterns is important for determining product quality. Recently, deep-learning techniques have been introduced to automate the process of inspection pattern recognition. These tools have been successfully applied in many fields, but they have not yet been fully applied to specific semiconductor inspection tasks such as clustering the same type of defects. TDA-based methods have been proposed that first employ TDA to delimit defect patterns and then a Gaussian mixture model to perform clustering on the defect patterns for a given annealing result.

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Additional Files

Published

2024-09-14

Data Availability Statement

The dataset used in this study was provided by a Taiwan-based semiconductor manufacturing company and is not publicly available due to proprietary restrictions. A public wafer defect dataset (SE-WWI) was also used for comparative experiments.

How to Cite

Topology-Driven Neural Defect Pattern Discovery in Silicon Wafers. (2024). The American Journal of Analytics and Artificial Intelligence (AJAAI), 2(03). https://doi.org/10.5281/zenodo.20591504

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